mirror of
https://github.com/wjakob/tbb.git
synced 2026-08-31 01:20:42 +08:00
Hans Johnson
e32d75f876
The new release TBB is now under a new more
open license.
Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/
The list of most significant changes made over time in
Intel(R) Threading Building Blocks (Intel(R) TBB).
Intel TBB 2017
TBB_INTERFACE_VERSION == 9100
Changes (w.r.t. Intel TBB 4.4 Update 5):
- static_partitioner class is now a fully supported feature.
- async_node class is now a fully supported feature.
- Improved dynamic memory allocation replacement on Windows* OS to skip
DLLs for which replacement cannot be done, instead of aborting.
- Intel TBB no longer performs dynamic memory allocation replacement
for Microsoft* Visual Studio* 2008.
- For 64-bit platforms, quadrupled the worst-case limit on the amount
of memory the Intel TBB allocator can handle.
- Added TBB_USE_GLIBCXX_VERSION macro to specify the version of GNU
libstdc++ when it cannot be properly recognized, e.g. when used
with Clang on Linux* OS. Inspired by a contribution from David A.
- Added graph/stereo example to demostrate tbb::flow::async_msg.
- Removed a few cases of excessive user data copying in the flow graph.
- Reworked split_node to eliminate unnecessary overheads.
- Added support for C++11 move semantics to the argument of
tbb::parallel_do_feeder::add() method.
- Added C++11 move constructor and assignment operator to
tbb::combinable template class.
- Added tbb::this_task_arena::max_concurrency() function and
max_concurrency() method of class task_arena returning the maximal
number of threads that can work inside an arena.
- Deprecated tbb::task_arena::current_thread_index() static method;
use tbb::this_task_arena::current_thread_index() function instead.
- All examples for commercial version of library moved online:
https://software.intel.com/en-us/product-code-samples. Examples are
available as a standalone package or as a part of Intel(R) Parallel
Studio XE or Intel(R) System Studio Online Samples packages.
Changes affecting backward compatibility:
- Renamed following methods and types in async_node class:
Old New
async_gateway_type => gateway_type
async_gateway() => gateway()
async_try_put() => try_put()
async_reserve() => reserve_wait()
async_commit() => release_wait()
- Internal layout of some flow graph nodes has changed; recompilation
is recommended for all binaries that use the flow graph.
Preview Features:
- Added template class streaming_node to the flow graph API. It allows
a flow graph to offload computations to other devices through
streaming or offloading APIs.
- Template class opencl_node reimplemented as a specialization of
streaming_node that works with OpenCL*.
- Added tbb::this_task_arena::isolate() function to isolate execution
of a group of tasks or an algorithm from other tasks submitted
to the scheduler.
Bugs fixed:
- Added a workaround for GCC bug #62258 in std::rethrow_exception()
to prevent possible problems in case of exception propagation.
- Fixed parallel_scan to provide correct result if the initial value
of an accumulator is not the operation identity value.
- Fixed a memory corruption in the memory allocator when it meets
internal limits.
- Fixed the memory allocator on 64-bit platforms to align memory
to 16 bytes by default for all allocations bigger than 8 bytes.
- As a workaround for crashes in the Intel TBB library compiled with
GCC 6, added -flifetime-dse=1 to compilation options on Linux* OS.
- Fixed a race in the flow graph implementation.
Open-source contributions integrated:
- Enabling use of C++11 'override' keyword by Raf Schietekat.
------------------------------------------------------------------------
126 lines
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126 lines
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Classes</h2></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00015.html">tbb::atomic< T ></a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Primary template for atomic. <a href="a00015.html#details">More...</a><br/></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00077.html">tbb::mutex</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Wrapper around the platform's native lock. <a href="a00077.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00079.html">tbb::null_mutex</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">A mutex which does nothing. <a href="a00079.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00080.html">tbb::null_rw_mutex</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">A rw mutex which does nothing. <a href="a00080.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00100.html">tbb::queuing_mutex</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Queuing mutex with local-only spinning. <a href="a00100.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00101.html">tbb::queuing_rw_mutex</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Queuing reader-writer mutex with local-only spinning. <a href="a00101.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00103.html">tbb::interface5::reader_writer_lock</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Writer-preference reader-writer lock with local-only spinning on readers. <a href="a00103.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00116.html">tbb::recursive_mutex</a></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00135.html">tbb::spin_mutex</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">A lock that occupies a single byte. <a href="a00135.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">class  </td><td class="memItemRight" valign="bottom"><a class="el" href="a00136.html">tbb::spin_rw_mutex_v3</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">Fast, unfair, spinning reader-writer lock with backoff and writer-preference. <a href="a00136.html#details">More...</a><br/></td></tr>
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Typedefs</h2></td></tr>
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<tr class="memitem:ga69722571e9e4406693c4a1379f0b47eb"><td class="memItemLeft" align="right" valign="top">typedef <br class="typebreak"/>
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interface7::internal::padded_mutex<br class="typebreak"/>
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< interface7::internal::x86_eliding_mutex, <br class="typebreak"/>
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false > </td><td class="memItemRight" valign="bottom"><a class="el" href="a00249.html#ga69722571e9e4406693c4a1379f0b47eb">tbb::speculative_spin_mutex</a></td></tr>
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<tr class="memdesc:ga69722571e9e4406693c4a1379f0b47eb"><td class="mdescLeft"> </td><td class="mdescRight">A cross-platform spin mutex with speculative lock acquisition. <a href="#ga69722571e9e4406693c4a1379f0b47eb">More...</a><br/></td></tr>
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<tr class="memitem:ga97d0da95fd4f92af12de15e1a8b5c780"><td class="memItemLeft" align="right" valign="top">typedef <br class="typebreak"/>
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interface7::internal::padded_mutex<br class="typebreak"/>
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< tbb::interface8::internal::x86_rtm_rw_mutex, <br class="typebreak"/>
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true > </td><td class="memItemRight" valign="bottom"><a class="el" href="a00249.html#ga97d0da95fd4f92af12de15e1a8b5c780">tbb::interface8::speculative_spin_rw_mutex</a></td></tr>
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<tr class="memdesc:ga97d0da95fd4f92af12de15e1a8b5c780"><td class="mdescLeft"> </td><td class="mdescRight">A cross-platform spin reader/writer mutex with speculative lock acquisition. <a href="#ga97d0da95fd4f92af12de15e1a8b5c780">More...</a><br/></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<td class="memname">typedef interface7::internal::padded_mutex< spin_mutex, false > <a class="el" href="a00249.html#ga69722571e9e4406693c4a1379f0b47eb">tbb::speculative_spin_mutex</a></td>
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<p>A cross-platform spin mutex with speculative lock acquisition. </p>
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<p>On platforms with proper HW support, this lock may speculatively execute its critical sections, using HW mechanisms to detect real data races and ensure atomicity of the critical sections. In particular, it uses Intel(R) Transactional Synchronization Extensions (Intel(R) TSX). Without such HW support, it behaves like a <a class="el" href="a00135.html" title="A lock that occupies a single byte. ">spin_mutex</a>. It should be used for locking short critical sections where the lock is contended but the data it protects are not. If zero-initialized, the mutex is considered unheld. </p>
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<td class="memname">typedef interface7::internal::padded_mutex< <a class="el" href="a00136.html">tbb::spin_rw_mutex</a>, true > <a class="el" href="a00249.html#ga97d0da95fd4f92af12de15e1a8b5c780">tbb::interface8::speculative_spin_rw_mutex</a></td>
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<p>A cross-platform spin reader/writer mutex with speculative lock acquisition. </p>
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<p>On platforms with proper HW support, this lock may speculatively execute its critical sections, using HW mechanisms to detect real data races and ensure atomicity of the critical sections. In particular, it uses Intel(R) Transactional Synchronization Extensions (Intel(R) TSX). Without such HW support, it behaves like a spin_rw_mutex. It should be used for locking short critical sections where the lock is contended but the data it protects are not. </p>
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Copyright © 2005-2016 Intel Corporation. All Rights Reserved.
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Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
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registered trademarks or trademarks of Intel Corporation or its
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subsidiaries in the United States and other countries.
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* Other names and brands may be claimed as the property of others.
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