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62 lines
3.2 KiB
C++
62 lines
3.2 KiB
C++
/*
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Copyright 2005-2016 Intel Corporation. All Rights Reserved.
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This file is part of Threading Building Blocks. Threading Building Blocks is free software;
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you can redistribute it and/or modify it under the terms of the GNU General Public License
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version 2 as published by the Free Software Foundation. Threading Building Blocks is
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distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the
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implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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See the GNU General Public License for more details. You should have received a copy of
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the GNU General Public License along with Threading Building Blocks; if not, write to the
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Free Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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As a special exception, you may use this file as part of a free software library without
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restriction. Specifically, if other files instantiate templates or use macros or inline
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functions from this file, or you compile this file and link it with other files to produce
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an executable, this file does not by itself cause the resulting executable to be covered
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by the GNU General Public License. This exception does not however invalidate any other
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reasons why the executable file might be covered by the GNU General Public License.
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*/
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#ifndef __TBBexample_graph_logicsim_fba_H
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#define __TBBexample_graph_logicsim_fba_H 1
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#include "one_bit_adder.h"
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typedef composite_node< tuple< signal_t, signal_t, signal_t, signal_t, signal_t, signal_t, signal_t, signal_t, signal_t >,
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tuple< signal_t, signal_t, signal_t, signal_t, signal_t > > fba_base_type;
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class four_bit_adder : public fba_base_type {
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graph& my_graph;
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std::vector<one_bit_adder> four_adders;
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public:
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four_bit_adder(graph& g) : fba_base_type(g), my_graph(g), four_adders(4, one_bit_adder(g)) {
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make_connections();
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set_up_composite();
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}
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four_bit_adder(const four_bit_adder& src) :
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fba_base_type(src.my_graph), my_graph(src.my_graph), four_adders(4, one_bit_adder(src.my_graph))
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{
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make_connections();
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set_up_composite();
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}
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~four_bit_adder() {}
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private:
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void make_connections() {
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make_edge(output_port<1>(four_adders[0]), input_port<0>(four_adders[1]));
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make_edge(output_port<1>(four_adders[1]), input_port<0>(four_adders[2]));
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make_edge(output_port<1>(four_adders[2]), input_port<0>(four_adders[3]));
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}
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void set_up_composite() {
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fba_base_type::input_ports_type input_tuple(input_port<0>(four_adders[0]/*CI*/), input_port<1>(four_adders[0]), input_port<2>(four_adders[0]), input_port<1>(four_adders[1]), input_port<2>(four_adders[1]), input_port<1>(four_adders[2]), input_port<2>(four_adders[2]), input_port<1>(four_adders[3]), input_port<2>(four_adders[3]));
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fba_base_type::output_ports_type output_tuple(output_port<0>(four_adders[0]), output_port<0>(four_adders[1]), output_port<0>(four_adders[2]), output_port<0>(four_adders[3]),output_port<1>(four_adders[3]/*CO*/));
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fba_base_type::set_external_ports(input_tuple, output_tuple);
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}
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};
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#endif /* __TBBexample_graph_logicsim_fba_H */
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